General form of VHDL linking...

by barkkathulla 2012-09-22 12:46:51

ENTITY fourbitcounter IS /* creating an entity for four bit counter */
PORT (
Clock : IN STD_LOGIC;
Enable : IN STD_LOGIC;
Clear_n : IN STD_LOGIC;
Initial_Value : IN STD_LOGIC_VECTOR(3 downto 0);
Load_n : IN STD_LOGIC;
Counter_Output : OUT STD_LOGIC_VECTOR(3 downto 0));
END fourbitcounter;
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